Applications - 3.3 English

40G/50G High Speed Ethernet Subsystem v3.3 Product Guide (PG211)

Document ID
PG211
Release Date
2023-11-01
Version
3.3 English

The AMD 40G/50G High Speed Ethernet Subsystem is designed to function as the network interface for applications that require a very high bit rate, such as:

  • Ethernet switches
  • IP routers
  • Data center switches
  • Communications equipment

The capability to interconnect devices at 50 Gbps Ethernet rates becomes especially relevant for next-generation data center networks where:

  • To keep up with increasing CPU and storage bandwidth, rack, or blade servers must support aggregate throughputs faster than 10 Gbps (single lane) or 20 Gbps (dual lane) from their Network Interface Card (NIC) or LAN-on-Motherboard (LOM) networking ports.
  • Given the increased bandwidth to endpoints, uplinks from Top-of-Rack (TOR) or Blade switches need to transition from 40 Gbps (four lanes) to 100 Gbps (four lanes) while ideally maintaining the same per-lane breakout capability.
  • Due to the expected adoption of 100GBASE-CR4/KR4/SR4/LR4, SerDes, and cabling technologies are already being developed and deployed to support 25 Gbps per physical lane, twin-ax cable, or fiber.