Core xci Top Level Port List - 3.3 English

40G/50G High Speed Ethernet Subsystem v3.3 Product Guide (PG211)

Document ID
PG211
Release Date
2023-11-01
Version
3.3 English

In the following tables an asterisk (*) represents the core number, having a value of 0 and 1.

Example: Port_NAME_*

  • Port_NAME_0: for first core
  • Port_NAME_1: for second core (is present when you select number of cores 2)