Port List — Auto-Negotiation - 3.3 English

40G/50G High Speed Ethernet Subsystem v3.3 Product Guide (PG211)

Document ID
PG211
Release Date
2023-11-01
Version
3.3 English

The following additional signals are used for the auto-negotiation function. These signals are found at the *wrapper.v hierarchy.

Table 1. Auto-Negotiation Ports
Port Name I/O Clock Domain Description and Notes
an_clk I   Input Clock for the Auto-Negotiation circuit. The required frequency is indicated in the readme file for the release. It should be a free running clock.
an_reset I an_clk Synchronous active-High reset corresponding to an_clk domain.
ctl_autoneg_enable I an_clk Enable signal for auto-negotiation.
ctl_autoneg_bypass I an_clk Input to disable auto-negotiation and bypass the auto-negotiation function. If this input is asserted, auto-negotiation is turned off, but the PCS is connected to the output to allow operation.
ctl_an_nonce_seed[7:0] I an_clk

8-bit seed to initialize the nonce field polynomial generator. Non-zero. The auto-negotiation does not function if this is zero.

ctl_an_pseudo_sel I an_clk Selects the polynomial generator for the bit 49 random bit generator. If this input is 1, the polynomial is x7+x6+1. If this input is zero, the polynomial is x7+x3+1.
ctl_restart_negotiation I an_clk This input is used to trigger a restart of the auto-negotiation, regardless of what state the circuit is currently in.
ctl_an_local_fault I an_clk This input signal is used to set the remote_fault bit of the transmit link codeword.
Signals Used for PAUSE Ability Advertising
ctl_an_pause I an_clk This input signal is used to set the PAUSE bit, (C0), of the transmit link codeword. This signal might not be present if the core does not support pause.
ctl_an_asmdir I an_clk This input signal is used to set the ASMDIR bit, (C1), of the transmit link codeword. This signal might not be present if the core does not support pause.
Ability Signal Inputs
ctl_an_ability_1000base_kx I an_clk These inputs identify the Ethernet protocol abilities that are advertised in the transmit link codeword to the link partner. A value of 1 indicates that the interface advertises that it supports the protocol.
ctl_an_ability_100gbase_cr10 I an_clk
ctl_an_ability_100gbase_cr4 I an_clk
ctl_an_ability_100gbase_kp4 I an_clk
ctl_an_ability_100gbase_kr4 I an_clk
ctl_an_ability_10gbase_kr I an_clk
ctl_an_ability_10gbase_kx4 I an_clk
ctl_an_ability_25gbase_krcr I an_clk
ctl_an_ability_25gbase_cr1 I an_clk
ctl_an_ability_25gbase_krcr_s I an_clk
ctl_an_ability_25gbase_kr1 I an_clk
ctl_an_ability_40gbase_cr4 I an_clk
ctl_an_ability_40gbase_kr4 I an_clk
ctl_an_ability_50gbase_cr2 I an_clk
ctl_an_ability_50gbase_kr2 I an_clk
ctl_lt_polynomial_select I an_clk
ctl_an_ability_2_5gbase_kx I an_clk
ctl_an_ability_5gbase_kr I an_clk
ctl_an_ability_50gbase_krcr I an_clk
ctl_an_ability_200gbase_kr4cr4 I an_clk
ctl_an_ability_100gbase_kr2cr2 I an_clk
ctl_an_fec_10g_request I an_clk Used to set the clause 74 FEC request bit in the transmit link codeword. This signal applies only to PMDs running at 10 Gb/s. It is ignored in PMDs running any other rate.
ctl_an_fec_ability_override I an_clk Used to set the clause 74 FEC ability bit in the transmit link codeword. If this input is set, the FEC ability bit in the transmit link codeword is cleared. This signal might not be present if the IP core does not support clause 74 FEC.
ctl_an_cl91_fec_ability I an_clk This bit is used to set clause 91 FEC ability.
ctl_an_cl91_fec_request I an_clk This bit is used to request clause 91 FEC.
ctl_an_fec_25g_rs_request I an_clk Used to set the RS-FEC request bit in the transmit link codeword. This signal applies only to PMDs running at 25 Gb/s. It is ignored in PMDs running any other rate.
ctl_an_fec_25g_baser_request I an_clk Used to set the clause 74 FEC request bit in the transmit link codeword. This signal applies only to PMDs running at 25  Gb/s. It is ignored in PMDs running any other rate.
stat_an_rxcdrhold O an_clk Used to set the rxcdrhold_in of the GT during auto-negotiation.
stat_an_link_cntl_1000base_kx[1:0] O an_clk Link Control outputs from the auto-negotiation controller for the various Ethernet protocols. Settings are as follows:
  • 00: DISABLE; PCS is disconnected;
  • 01: SCAN_FOR_CARRIER; RX is connected to PCS;
  • 11: ENABLE; PCS is connected for mission mode operation.
  • 10: not used
stat_an_link_cntl_100gbase_cr10[1:0] O an_clk
stat_an_link_cntl_100gbase_cr4[1:0] O an_clk
stat_an_link_cntl_100gbase_kp4[1:0] O an_clk
stat_an_link_cntl_100gbase_kr4[1:0] O an_clk
stat_an_link_cntl_10gbase_kr[1:0] O an_clk
stat_an_link_cntl_10gbase_kx4[1:0] O an_clk
stat_an_link_cntl_25gbase_krcr[1:0] O an_clk
stat_an_link_cntl_25gbase_cr1[1:0] O an_clk
stat_an_link_cntl_25gbase_krcr_s[1:0] O an_clk
stat_an_link_cntl_25gbase_kr1[1:0] O an_clk
stat_an_link_cntl_40gbase_cr4[1:0] O an_clk
stat_an_link_cntl_40gbase_kr4[1:0] O an_clk
stat_an_link_cntl_50gbase_cr2[1:0] O an_clk
stat_an_link_cntl_50gbase_kr2[1:0] O an_clk
stat_an_fec_enable O an_clk Used to enable the use of clause 74 FEC on the link.
stat_an_rs_fec_enable O an_clk Used to enable the use of clause 91 FEC on the link.
stat_an_tx_pause_enable O an_clk Used to enable station-to-station (global) pause packet generation in the transmit path to control data flow in the receive path.
stat_an_rx_pause_enable O an_clk Used to enable station-to-station (global) pause packet interpretation in the receive path, in order to control data flow from the transmitter.
stat_an_autoneg_complete O an_clk Indicates the auto-negotiation is complete and rx link status from the PCS has been received.
stat_an_parallel_detection_fault O an_clk Indicated a parallel detection fault during auto-negotiation.
stat_an_lp_ability_1000base_kx O an_clk These signals indicate the advertised protocol from the link partner. They all become valid when the output signal stat_an_lp_ability_valid is asserted. A value of 1 indicates that the protocol is advertised as supported by the link partner.
stat_an_lp_ability_100gbase_cr10 O an_clk
stat_an_lp_ability_100gbase_cr4 O an_clk
stat_an_lp_ability_100gbase_kp4 O an_clk
stat_an_lp_ability_100gbase_kr4 O an_clk
stat_an_lp_ability_10gbase_kr O an_clk
stat_an_lp_ability_10gbase_kx4 O an_clk
stat_an_lp_ability_25gbase_krcr O an_clk
stat_an_lp_ability_25gbase_krcr_s O an_clk
stat_an_lp_ability_40gbase_cr4 O an_clk
stat_an_lp_ability_40gbase_kr4 O an_clk
stat_an_lp_ability_25gbase_cr1 O an_clk Indicates the advertised protocol from the link partner. Becomes valid when the output signal stat_an_lp_extended_ability_valid is asserted. A value of 1 indicates that the protocol is advertised as supported by the link partner.
stat_an_lp_ability_25gbase_kr1 O an_clk Indicates the advertised protocol from the link partner. Becomes valid when the output signal stat_an_lp_extended_ability_valid is asserted. A value of 1 indicates that the protocol is advertised as supported by the link partner.
stat_an_lp_ability_50gbase_cr2 O an_clk Indicates the advertised protocol from the link partner. Becomes valid when the output signal stat_an_lp_extended_ability_valid is asserted. A value of 1 indicates that the protocol is advertised as supported by the link partner.
stat_an_lp_ability_50gbase_kr2 O an_clk Indicates the advertised protocol from the link partner. Becomes valid when the output signal stat_an_lp_extended_ability_valid is asserted. A value of 1 indicates that the protocol is advertised as supported by the link partner.
stat_an_lp_pause O an_clk This signal indicates the advertised value of the PAUSE bit, (C0), in the receive link codeword from the link partner. It becomes valid when the output signal stat_an_lp_ability_valid is asserted.
stat_an_lp_asm_dir O an_clk This signal indicates the advertised value of the ASMDIR bit, (C1), in the receive link codeword from the link partner. It becomes valid when the output signal stat_an_lp_ability_valid is asserted.
stat_an_lp_fec_10g_ability O an_clk

This signal indicates the advertised value of the clause 74 FEC ability bit in the receive link codeword on the corresponding

10 Gb/s PMD interface from the link partner. It becomes valid when the output signal stat_an_lp_ability_valid is asserted.

stat_an_lp_fec_10g_request O an_clk This signal indicates the advertised value of the clause 74 FEC Request bit in the receive link codeword on the corresponding 10 Gb/s PMD interface from the link partner. It becomes valid when the output signal stat_an_lp_ability_valid is asserted.
stat_an_lp_fec_25g_rs_request O an_clk This signal indicates the advertised value of the RS-FEC request bit in the receive link codeword on the corresponding 25 Gb/s PMD interface from the link partner. It becomes valid when the output signal.
stat_an_lp_fec_25g_baser_request O an_clk This signal indicates the advertised value of the clause 74 FEC request bit in the receive link codeword on the corresponding 25 Gb/s PMD interface from the link partner. It becomes valid when the output signal stat_an_lp_ability_valid is asserted.
stat_an_lp_autoneg_able O an_clk This output signal indicates that the link partner is able to perform auto-negotiation. It becomes valid when the output signal stat_an_lp_ability_valid is asserted.
stat_an_lp_ability_valid O an_clk This signal indicates when all of the link partner advertisements become valid.
an_loc_np_data[47:0] I an_clk Local Next Page codeword. This is the 48 bit codeword used if the loc_np input is set. In this data field, the bits NP, ACK, & T, bit positions 15, 14, 12, and 11, are not transferred as part of the next page codeword. These bits are generated in the AN IP. However, the Message Protocol bit, MP, in bit position 13, is transferred.
an_lp_np_data[47:0] O an_clk Link Partner Next Page Data. This 48-bit word is driven by the AN IP with the 48 bit next page codeword from the remote link partner.
ctl_an_loc_np I an_clk Local Next Page indicator. If this bit is 1, the AN IP transfers the next page word at input loc_np_data to the remote link partner. If this bit is 0, the AN IP does not initiate the next page protocol. If the link partner has next pages to send and the loc_np bit is clear, the AN IP transfers null message pages.
stat_fec_inc_cant_correct_count[3:0] O rx_serdes_clk

Logical indication of uncorrectable errors. If an uncorrectable packet is encountered, this

output signal cycles once. The signal is High

for a minimum of 16 clocks and goes Low for a minimum of 16 clocks. There is one per lane.

stat_fec_inc_correct_count[3:0] O rx_serdes_clk

Logical indication of correctable errors. If a

correctable packet is encountered, this output signal cycles once. The signal is High for a minimum of 16 clocks and goes Low for a minimum of 16 clocks. There is one per lane.

stat_fec_lock_error[3:0] O rx_serdes_clk

Logical indication of a failure to achieve a frame lock. The receiver scans the incoming data stream for about 10,000,000 bits, attempting all possible bit alignments for frame synchronization. After this time, this signal is asserted High and remains High until the receiver achieves a frame lock.

There is one per lane.

stat_fec_rx_lock[3:0] O rx_serdes_clk Logical indication of a frame lock. The receiver asserts this signal High when it achieves a frame lock to the incoming bitstream. There is one per lane.
ctl_an_lp_np_ack I an_clk

Link Partner Next Page Acknowledge. This is used to signal the AN IP that the next page data from the remote link partner at output pin lp_np_data has been read by the local host. When this signal goes High, the AN IP acknowledges reception of the next page codeword to the remote link partner and initiate transfer of the next codeword.

During this time, the AN IP removes the lp_np signal until the new next page information is available.

stat_an_loc_np_ack O an_clk This signal is used to indicate to the local host that the local next page data, presented at input pin loc_np_data, has been taken. This signal pulses High for 1 clock period when the AN IP samples the next page data on input pin loc_np_data. When the local host detects this signal High, it must replace the 48 bit next page codeword at input pin loc_np_data with the next 48 bit codeword to be sent. If the local host has no more next pages to send, it must clear the loc_np input.
stat_an_lp_np O an_clk Link Partner Next Page. This signal is used to indicate that there is a valid 48 bit next page codeword from the remote link partner at output pin lp_np_data. This signal is driven Low when the lp_np_ack input signal is driven High, indicating that the local host has read the next page data. It remains Low until the next codeword becomes available on the lp_np_data output pin; the lp_np output is driven High again.
stat_an_lp_ability_extended_fec[1:0] O an_clk This output indicates the extended FEC abilities as defined in Schedule 3.
stat_an_lp_extended_ability_valid O an_clk When this bit is 1, it indicates that the detected extended abilities are valid.
stat_an_lp_rf O an_clk This bit indicates link partner remote fault.
stat_an_start_tx_disable O an_clk When ctl_autoneg_enable is High and ctl_autoneg_bypass is Low, this signal, stat_an_start_tx_disable, cycles High for 1 clock cycle at the very start of the TX_DISABLE phase of auto-negotiation. That is, when auto-negotiation enters the state TX_DISABLE, this output cycles High for 1 clock period. It effectively signals the start of auto-negotiation.
stat_an_start_an_good_check O an_clk

When ctl_autoneg_enable is High and ctl_autoneg_bypass is Low, this signal, stat_an_start_an_good_check, cycles High for 1 clock cycle at the very start of the AN_GOOD_CHECK phase of auto-negotiation. That is, when auto-negotiation enters the state, AN_GOOD_CHECK, this output cycles High for 1 clock period. It effectively signals the start of link training. However, if link training is not enabled, that is, if the input ctl_lt_training_enable is Low, the stat_an_start_an_good_check output effectively signals the start of mission-mode operation.