This configuration gives the flexibility to switch the line rate between 40G to
50G and vice-versa any time. To activate this feature, select the check box Runtime Switchable mode option in the Configuration tab.
When this option is selected speed can be changed by using ch0_txrate
and ch0_rxrate
ports.
Internally, the GT IP performs required DRP writes to get the desired speed. When this
option is selected the *_trans_debug
module is present
inside the *_pkt_gen_mon.v module of the example
design. This *_trans_debug
module is responsible for
performing all the GT DRP write operations to switch the transceiver mode, that is, 40G
to 50G or 50G to 40G. When you set the mode_change_*
input
signal High for two clock cycles and make it Low, it starts the DRP
write operation to the GT channel for the specific core and resets the specific core.
The DRP writes are done only for the channel. The QPLL0 of the common is fixed for the
line rate 50G and the QPLL1 is fixed for the line rate 40G.
The state transition occurred during this process is shown in the following figure.