Basic Tab - 1.3 English

UltraScale+ Devices Integrated Block for PCI Express Product Guide (PG213)

Document ID
PG213
Release Date
2023-10-19
Version
1.3 English

The Basic page with Advanced mode selected (shown in the following figure) includes additional settings. The following parameters are visible on the Basic page when the Advanced mode is selected.

Figure 1. Basic Tab, Advanced Mode
Enable GT Quad Selection
When selected, this parameter enables you to select the different GT Quads available for a PCIe block.
GT Quad
This drop-down menu lists all the available GT quads for a given PCIe block. Note that depending on the GT Quad selected, the Maximum link width that can be configured for that particular quad will change.
Core Clock Frequency
This parameter allows you to select the core clock frequencies.

For Gen3 link speed:

  • For a -1, -2 and -3 speed grade and an x8 link width, the values of 250 MHz and 500 MHz are available for selection
  • For a -2L, -2LV, -1L and -1LV speed grade and an x8 link width, this parameter defaults to 250 MHz and is not available for selection.
  • For x16 link widths, the value of this parameter defaults to 500 MHz and is not available for selection.
  • For x1,x2 and x4 link widths, this parameter defaults to 250 MHz and is not available for selection.

For Gen1 and Gen2 link speeds:

  • For link widths other than x8, this parameter defaults to 250 MHz and is not available for selection.
  • For x8 link widths, this parameter defaults to 500 MHz and is not available for selection.
Enable Parity
Enables Parity on TX/RX interfaces including MSI-X.
PCIe DRP Ports
When checked, enables the PCIe DRP interface. This interface allow user to change PCIe IP attributes, however, should not be used without direction from AMD Technical Support team.
GT Channel DRP
When checked, enables the GT channel DRP interface.