The Root Port Model was created to work with the PIO design, and for this reason is tailored to make specific checks and warnings based on the limitations of the PIO design. These checks and warnings are enabled by default when the Root Port Model is generated by the Vivado IP catalog. However, these limitations can be disabled so that they do not affect the customer design.
Because the PIO design was created to support at most one I/O BAR, one Mem64
BAR, and two Mem32 BARs (one of which must be the EROM space), the Root Port Model by
default makes a check during device configuration that verifies that the core has been
configured to meet this requirement. A violation of this check displays a warning
message and the offending BAR is gracefully disabled in the test bench. This check can
be disabled by setting the pio_check_design variable to
zero in the pci_exp_usrapp_tx.v file.