Introduction - 1.3 English

The AMD UltraScale+™ Devices Integrated Block for PCI Express® ( PCIe® ) solution IP core is a high-bandwidth, scalable, and reliable serial interconnect building block solution for use with UltraScale+ devices. AMD offers two PCIe integrated blocks in the UltraScale+ architecture: the PCIe4 integrated block, and the PCIe4C integrated block. The PCIe4 block, which is found in UltraScale+ devices, supports the PCIe IP. The AMD Virtex™ UltraScale+™ devices with high bandwidth memory (HBM) contain a mixture of the PCIe4 blocks and enhanced PCIe4C blocks. The PCIe4 block supports 1-lane, 2-lane, 4-lane, 8-lane, and 16-lane configurations, including Gen1 (2.5 GT/s), Gen2 (5.0 GT/s) and Gen3 (8 GT/s) speeds. It is compliant with PCI Express Base Specification, rev3.1 . The PCIe4C block is functionally equivalent to the PCIe4 block, and additionally supports Gen4 (16 GT/s) speed with 1-lane, 2-lane, 4-lane and 8-lane configuration, compatible to PCI Express Base Specification, Revision 4.0. This solution supports the AXI4-Stream interface for the customer user interface.