The PCI Express
Base Specification 3.1 has many optional features. Some of the features which are
not supported are listed below:
- Does not implement the Address Translation Service, but allows its implementation in external soft logic.
- Switch ports.
- Resizable BAR extended capability.
- ID-based TLP ordering.
- The PCI Express secure IP model does not support simulation of the DRP interface.
- Tandem Configuration (Tandem PROM, Tandem PCIe, and DFX over PCIe) simulation is not supported; the simulation model of the integrated block does not support it.
- In Root Port mode, the IP does not implement TLP filtering based on the Bus Master Enable register bit internally. If this feature is required in the design, you must build external packet filtering logic.