HDMI TX Flow - 2.2 English

Video PHY Controller LogiCORE IP Product Guide (PG230)

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2.2 English

A change in the TX reference clock signifies a video format change, which triggers a series of interrupts until the GT TX attains the TX Alignment Done status . The TX frequency change is based on the toggling (deassertion then assertion) of the tx_refclk_rdy port or it can be forced by setting the TX Frequency Reset bit (bit 3) of the Clock Detector Control register (0x200). Note that this bit is self-clearing. SeeHDMI Reference Clock Requirements for details about tx_refclk_rdy port implementation.

There are several API callback hooks that the Video PHY Controller core executes throughout the HDMI TX operation. If necessary, these callbacks are available for inserting or adding more function calls on top of what is in the software application.

Figure 1. HDMI TX Program Flow
Note: B in the previous figure continues in the next figure.