Register Changes - 2.2 English

Video PHY Controller LogiCORE IP Product Guide (PG230)

Document ID
PG230
Release Date
2022-10-19
Version
2.2 English

There is no register change from v2.0 to v2.1.

The following table shows the changes from v2.1 to v2.2.

Table 1. Core Changes from v2.1 to v2.2
Address Register Name Note
0x0070 TX Control (TXC) Additional 1 bit for TXPRBSSEL per channel. (at bit - 6,14,22 and 30)
0x0100 RX Control (RXC) Extended 1 bit extra for RXPRBSSEL register width
0x0110 Interrupt Enable Register (IER) Added “TX MMCM Lock Change Event” and “RX MMCM Lock Change Event”
0x0114 Interrupt Disable Register (IDR) Added “TX MMCM Lock Change Event“ and “RX MMCM Lock Change Event”
0x0118 Interrupt Mask Register (IMR) Added “TX MMCM Lock Change Event” and “RX MMCM Lock Change Event”
0x011C Interrupt Status Register (ISR) Added “TX MMCM Lock Change Event” and “RX MMCM Lock Change Event”
0x0124 DRP Control MMCM TXUSRCLK Newly introduced register for MMCM setting
0x0128

DRP CONTROL MMCM

TXUSRCLK

Newly introduced register for MMCM setting
0x0144 DRP Control MMCM TRUSRCLK Newly introduced register for MMCM setting
0x0148

DRP CONTROL MMCM

RXUSRCLK

Newly introduced register for MMCM setting
0x0340 Control Register Newly introduced register for TX TMDS Pattern Generator