Maximum Frequencies
The following are typical clock frequencies for the target devices:
- AMD Virtex™ 7 devices with –2 speed grade, AMD Virtex™ UltraScale™ , and AMD Virtex UltraScale+ devices with –2 speed grade or higher: 300 MHz
- AMD Kintex™ 7 devices with –2 speed grade, AMD Kintex™ UltraScale+™ , and AMD Kintex UltraScale+ devices with –2 speed grade or higher: 300 MHz
- AMD UltraScale+ devices with -1 speed grade or higher: 300 MHz
- AMD Artix™ 7 devices with –2 speed grade or higher: 150 MHz
- AMD Zynq™ 7000 SoC devices with –2 and –1 speed grade or higher: 200 MHz
- AMD Versal™ adaptive SoC with -1 speed grade or higher: 300 MHz
The maximum achievable clock frequency can vary. The maximum achievable clock frequency and all resource counts can be affected by other tool options, additional logic in the device, using a different version of AMD tools, and other factors.
Latency
The latency of the Video Processing Subsystem depends on the configuration of the core. Generally, the latency is on the order of several lines. For example, a vertical scaler with a 6-tap polyphase filter operating on RGB video introduces four video lines of delay.
In the Full Fledged configuration with the use of a DMA, the latency is one full frame time plus several lines because the video DMA engine is used in the data flow and programmed to read one frame buffer behind the write frame buffer location.
In interlaced video, one of field additional delay is incurred by the deinterlacer algorithm.
Scaler Only Mode
In Scaler Only mode, at the start of the first frame, the Scaler will copy the coefficients from the AXI4-Lite interface into a local RAM. This will take about 500 cycles. After this, the scaler should be able to start filling its internal line buffer. Scaler starts generating output when the line buffer is filled about half full. If the supports 4:2:0, the buffer for chroma resampling will also need to be filled. As a safe measure, Scaler uses the number of vertical taps for the number of lines of latency. After every line, the Scaler will have to do some bookkeeping, and therefore for about 20 cycles the Scaler will not be able to accept data. You can reduce the initial latency by reducing the number of vertical taps.