Dynamic VC Selection Register Programming - 5.3 English

MIPI CSI-2 Receiver Subsystem Product Guide (PG232)

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5.3 English

The users can update the VC Selection register for each packet (0 to 1 or 1 to 0) anytime when the core is in operation. Alternatively, they can disable core, program VC Selection register, and enable core.

When a VC is moved from 0 to 1, that is, new VC enabled, the core waits for a Frame Start with this new VC and starts sending out packets from Frame Start.

When a VC is moved from 1 to 0, that is, existing VC disabled, the core stops processing all packets with this VC immediately. It will not wait for any synchronization packets like Frame End. “Frame synchronization error” will not generate even if the VC is disabled before getting “Frame End” for the corresponding VC.