AXI4-Stream Pinouts - 3.2 English

HDMI 1.4/2.0 Transmitter Subsystem Product Guide (PG235)

Document ID
PG235
Release Date
2023-10-18
Version
3.2 English

The following four figures show the HDMI 1.4/2.0 TX Subsystem ports when AXI4-Stream is selected as the video interface. The VIDEO_IN port is expanded in the figure to show the detail of the AXI4-Stream video bus signals. The subsystem has the following default interfaces:

  • AXI4-Lite CPU control interface (S_AXI_CPU_IN)
  • AXI4-Stream Video interface (VIDEO_IN )
  • AXI4-Stream Audio interface (AUDIO_IN )
Note: In the following diagrams, for all AXI4-Stream interfaces video_data_width = (int((3*BPC*PPC+7)/8))*8 and for all native interfaces video_data_width = 3*BPC*PPC.
Figure 1. HDMI TX Subsystem Pinout – AXI4-Stream Video Interface (No HDCP)
Figure 2. HDMI TX Subsystem Pinout – AXI4-Stream Video Interface (HDCP 1.4 Only)
Figure 3. HDMI TX Subsystem Pinout – AXI4-Stream Video Interface (HDCP 2.3 Only)
Figure 4. HDMI TX Subsystem Pinout – AXI4-Stream Video Interface (HDCP 1.4 and HDCP 2.3)