XV_HDMITXSS_HANDLER_STREAM_UP - 3.2 English

HDMI 1.4/2.0 Transmitter Subsystem Product Guide (PG235)

Document ID
PG235
Release Date
2023-10-18
Version
3.2 English

This interrupt is triggered every time the Video PHY Controller /HDMI GT Subsystem is reconfigured and the output clock is stabilized and ready for the HDMI 1.4/2.0 TX Subsystem to transmit a video stream.

The callback function must perform the following:

  1. If an HDMI Retimer or equalizer is used in the system, configure the Retimer with the correct setting based on the required line rate.
  2. Enable the TX TMDS clock by calling the Video PHY Controller /HDMI GT Subsystem API:
    void XVphy_Clkout1OBufTdsEnable(XVphy *InstancePtr, 
                                    XVphy_DirectionType Dir,
                                    u8 Enable);
  3. Set HDMI 1.4/2.0 TX Subsystem sampling rate with the Video PHY Controller /HDMI GT Subsystem TX sampling rate.
    void XV_HdmiTxSs_SetSamplingRate(XV_HdmiTxSs *InstancePtr, 
                                     u8 SamplingRate);