Case 4: Enabling the Core in Video/Command Mode - 2.3 English

MIPI DSI Transmitter Subsystem Product Guide (PG238)

Document ID
PG238
Release Date
2022-10-19
Version
2.3 English

1.Command Mode:

°If core_en = 0: Enable bits 3 and 0 in Core Configuration Register (0x0)

°If core_en = 1 and command_mode = 0

-Disable the core, make core enable 0

-Enable command mode

-Enable Core

2.Video Mode:

°If core_en = 0:

-Program required Timing Registers

-Make core_en = 1 and command mode bit = 0

°If core_en = 1 and command_mode = 1

-Wait for command execution in progress (bit 11 of 0x2C) to be 0

-Ensure timing registers are programmed

-Make command mode = 0