The MIPI DSI TX Subsystem is tested for functionality, performance, and reliability using Xilinx® evaluation platforms. The MIPI DSI TX Subsystem verification test suites for all possible modules are continuously being updated to increase test coverage across the range of possible parameters for each individual module.
A series of MIPI DSI TX Subsystem test scenarios are validated using the Xilinx development boards listed in Table: Xilinx Development Board. These boards permit the prototyping of system designs where the MIPI DSI TX Subsystem processes different short/long packets received on serial lines.
Target Family |
Evaluation Board |
Characterization Board |
---|---|---|
Zynq® UltraScale+™ MPSoC |
ZCU102 |
N/A |
7 series devices do not have a native MIPI IOB support. You will have to target the HP bank and/or HR Bank I/O for MIPI IP implementation. For more information on MIPI IOB compliant solution and guidance, refer D-PHY Solutions (XAPP894) [Ref 17].
Table: Interoperability Testing shows the Interoperability Testing: