The ap_rst_n pin is an active-Low, synchronous reset input pertaining to both AXI4-Lite, AXI4-Stream, and memory mapped AXI4 interfaces. When ap_rst_n is set to 0, the core resets at the next rising edge of ap_clk .
The ap_rst_n pin is an active-Low, synchronous reset input pertaining to both AXI4-Lite, AXI4-Stream, and memory mapped AXI4 interfaces. When ap_rst_n is set to 0, the core resets at the next rising edge of ap_clk .