When all of the endpoint slaves connected to the MI-side of the SmartConnect are 32-bit-wide AXI4-Lite slaves, the SmartConnect Hierarchical IP uses Low-Area Mode to optimize for Area at the expense of performance. If any of the masters connected to the SI-side of the SmartConnect are AXI4 or AXI3 masters, then each SI internally includes a lightweight AXI4-Lite Protocol Converter. In-bound multi-beat INCR burst transactions are automatically converted into a sequence of single-beat transactions for AXI4-Lite slaves. Null WSTRB beats are suppressed, as described in Conversion to AXI4-Lite. However, Low-Area Mode does not support in-bound WRAP bursts and will issue a DECERR at the SI if it occurs.
If a connected master has a data width of more than 32 bits, lightweight downsizing logic is included in the Protocol Converter. If any MI operates in a different clock domain, a lightweight Clock Converter is included along the internal pathway. All SI (if more than one) must operate in the same clock domain, otherwise the SmartConnect does not use Low-Area Mode.
In Low-Area Mode, internal FIFO buffering is eliminated on all channels. All functional units along the internal pathways propagate a single outstanding write and read transaction at a time (multiple transfers could still be pipelined among the functional units). Also, the conditional register slices that are normally present, by default, on each SI and MI interface are disabled.
When an instance of SmartConnect is using Low-Area Mode, the following message is issued to the Vivado log file during Validation:
"INFO: [xilinx.com:ip:smartconnect:1.0-1] ... SmartConnect instancename is in Low-Area Mode."
Otherwise, the following message is issued to the Vivado log:
"INFO: [xilinx.com:ip:smartconnect:1.0-1] ... SmartConnect instancename is in High-performance Mode."
Note: When SmartConnect uses Low-Area Mode, the Show Advanced Properties button is disabled in SmartConnect's configuration dialog box.