Limitations - 1.0 English

SmartConnect (PG247)

Document ID
PG247
Release Date
2022-10-19
Version
1.0 English

The Advanced Properties window does not provide a way to override the SUPPORTS_NARROW_BURST property, which is automatically set according to the metadata found on the connected master endpoint. A Narrow Burst is any write or read transaction having multiple data beats (A*LEN>0) and requesting per-beat data transfers narrower than the full physical data-width of the interface, according to the A*SIZE signal.

Note:   A single-beat write or read with SIZE less than the SI data-width is a useful way to target a single location in a slave of narrower data-width, such as a control register, and is not considered to be a Narrow Burst.

Narrow Bursts are never propagated as-is across SmartConnect, regardless of intervening data-width conversions or the value of the Modifiable bit of the A*CACHE signal. All burst commands received on an SI are always fully packed before propagating to an MI.

SmartConnect supports the processing and packing of Narrow Bursts received on the SI, provided the SUPPORTS_NARROW_BURST property is enabled. Processing Narrow Bursts is logic-intensive, typically costing several hundred LUTs per SI, varying with data-width. Implementing Narrow Burst processing logic for masters that do not issue Narrow Burst wastes resources and latency, and should be avoided by packaging the master with accurate metadata. Conversely, if SUPPORTS_NARROW_BURST=0, any Narrow Burst commands observed on the SI will not propagate to the MI and will result in a DECERR response.

To determine whether Narrow Burst processing logic has been enabled, select the SI bus-interface pin (such as "S00_AXI") on the SmartConnect instance in the Block Diagram. In the Block Interface Properties pane, select the Properties tab and expand the CONFIG property group. The SUPPORTS_NARROW_BURST property indicates whether the connected master is requesting Narrow Burst processing.

Processing WRAP bursts is logic-intensive, typically costing several hundred LUTs per SI, varying with data-width. Implementing WRAP processing logic for masters that do not issue WRAP bursts wastes resources and latency, and should be avoided. To determine whether WRAP processing logic has been enabled by automation, select the SI bus-interface pin (such as “S00_AXI”) on the SmartConnect instance in the Block Diagram. In the Block Interface Properties pane, select the Properties tab and expand the CONFIG property group. The HAS_BURST property indicates whether the connected master is requesting WRAP burst processing. If CONFIG.HAS_BURST=1 and you know that the master does not generate WRAP bursts, then you can explicitly disable WRAP processing logic by setting SUPPORTS_WRAP=0 in the Advanced Properties window. When disabled, any WRAP burst commands observed on the SI will not propagate to the MI and will result in a DECERR response.