Upgrading Exceptions - 1.0 English

SmartConnect (PG247)

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1.0 English

At this time, if you have a design containing AXI Interconnect v2 or any of its standalone converter cores, Xilinx recommends that you continue using them under the following situations. For all other cases, you may want to upgrade to SmartConnect v1.0, but it is not required:

If your design contains an AXI Register Slice core, then you may continue to use it. The AXI Register Slice is still the recommended solution for stand-alone AXI pathway pipelining, offering a high degree of customization.

If your design uses an AXI Data Width Converter, AXI Clock Converter, AXI Protocol Converter, or AXI Data FIFO, and it is not directly connected to an interface of an AXI Interconnect v2 core, then you may either continue to use it or migrate to SmartConnect in a 1:1 configuration to perform those in-line functions.

If your design uses the AXI Interconnect v2 core in the Area Strategy mode, and any of your connected endpoint slaves are not AXI4-Lite, then you might either continue to use it or migrate to SmartConnect. Also see Reduced Area Mode under Advanced Properties.

If your design uses the AXI Interconnect v2 core and all of the endpoint slaves connected to the MI-side are 32-bit-wide AXI4-Lite slaves, then you might either continue to use it or migrate to SmartConnect. If you migrate, the SmartConnect Hierarchical IP uses Low-Area Mode to optimize for Area at the expense of performance. If any of the masters connected to the SI-side of the SmartConnect are AXI4 or AXI3 masters, then each SI internally includes a lightweight AXI4-Lite Protocol Converter. In-bound multi-beat INCR burst transactions are automatically converted into a sequence of single-beat transactions for AXI4-Lite slaves. If a connected master has a data width of more than 32 bits, lightweight downsizing logic is included in the Protocol Converter. If any MI operates in a different clock domain, a lightweight Clock Converter is included along the internal pathway. All SI (if more than one) are required to operate in the same clock domain, otherwise the SmartConnect does not use Low-Area Mode.

If your AXI Interconnect depends on fixed priority arbitration to strictly lock out lower-priority masters during higher-priority requests, then you might either continue to use it or migrate to SmartConnect; also see Priority Arbitration under Advanced Properties. If your AXI Interconnect uses fixed priority to lessen the impact of lower-priority masters on high-performance traffic, then you may still upgrade to SmartConnect by following the applicable guidelines in the Upgrading Instructions section.