The USXGMII IP provides a 32-bit AXI4-Stream interface for the TX and RX datapaths. The following subsections describe the clocks and resets and the interface signals in detail.
The USXGMII IP provides a 32-bit AXI4-Stream interface for the TX and RX datapaths. The following subsections describe the clocks and resets and the interface signals in detail.