Introduction - 1.2 English

USXGMII Ethernet Subsystem Product Guide (PG251)

Document ID
PG251
Release Date
2023-12-12
Version
1.2 English

The Universal Serial 10GE Media Independent Interface (USXGMII) IP Core implements an Ethernet Media Access Controller (MAC) with a mechanism to carry a single port of 10M, 100M, 1G, 2.5G, 5G, or 10GE over an IEEE 802.3 Clause 49 BASE-R physical coding sublayer/physical layer (PCS/PHY). The USXGMII IP core is delivered as encrypted register transfer level (RTL) through the AMD Vivado™ Design Suite targeted for AMD FPGAs.