Receive AXI4-Stream Interface - 1.2 English

USXGMII Ethernet Subsystem Product Guide (PG251)
Document ID
PG251
Release Date
2023-12-12
Version
1.2 English

The following table shows the AXI4-Stream receive interface signals.

Table 1. AXI4-Stream receive interface signals.
Name Direction Clock Domain Description
rx_axis_tvalid Output rx_clk_out AXI4-Stream Data Valid
rx_axis_tdata[31:0] Output rx_clk_out AXI4-Stream Data to upper layer
rx_axis_tlast Output rx_clk_out AXI4-Stream signal indicating an end of packet
rx_axis_tkeep[3:0] Output rx_clk_out AXI4-Stream Data control to upper layer
rx_axis_tuser Output rx_clk_out

AXI4-Stream User Sideband interface

1 indicates a bad packet has been received

0 indicates a good packet has been received