Bits | Default | Type | Signal |
---|---|---|---|
15:0 | 0 | RO | stat_umii_an_mr_lp_adv_ability |
16 | 0 | RO | stat_umii_an_mr_an_complete |
17 | 0 | RO | stat_umii_an_mr_np_able |
Note: AN Status register is not clear on
read.
|
Bits | Default | Type | Signal |
---|---|---|---|
15:0 | 0 | RO | stat_umii_an_mr_lp_adv_ability |
16 | 0 | RO | stat_umii_an_mr_an_complete |
17 | 0 | RO | stat_umii_an_mr_np_able |
Note: AN Status register is not clear on
read.
|