Error resilience is handled either at control software level or at hardware level. As errors are difficult to predict, it is possible that the hardware decoder hangs in an infinite loop. In that case, a watchdog is used to reset the decoder in a safe way to restart the decoding for the next frames.
The hardware IP only parses the slice data part of the bitstream. All headers are parsed and managed by the control software.
The error resilience for the headers is managed by the software and the error resilience for the slice data is managed by the hardware.
- Missing slices
- Inconsistent first LCU address syntax element.
When the software detects an error, a slice conceal command is sent to the hardware IP in order to fill the intermediate buffer. The intermediate buffer must always be fully filled so as to avoid dec timeout.
At slice data level, the hardware can detect different kinds of errors, like inconsistencies in the number of LCUs or in the range of various syntax elements. When an error is detected, a concealment flag is set in the corresponding LCU data in the intermediate buffer up the last LCU of the slice.
- If there is a reference picture available, the LCU is skipped using this picture as a reference.
- If there is no reference picture, the default intra prediction mode is applied.
When errors are detected by the hardware IP, it conceals the remaining part of the slice; there is no error code, only a single flag indicating if the slice has been concealed or not.
Decoder Hang Detection
However, the decoder should not hang even when decoding a corrupted bitstream, and it may be difficult to guarantee that it will never happen. In such cases, a watchdog is used to soft reset the decoder.