Control Interface Definition for Turbo Decode - 1.1 English

Soft-Decision FEC Integrated Block LogiCORE IP Product Guide (PG256)

Document ID
PG256
Release Date
2022-10-19
Version
1.1 English
Table 1. Control Interface Definition for Turbo Decode
Field Bits Range Description
id 31:24 0 to 255 External block identifier to be passed through to status output
max_iterations 23:18 1 to 63 Maximum number of iterations
term_on_no_change 17 0 or 1

0: Do not terminate early if there is no change in the hard systematic bits for the block between iterations

1: Terminate early if there is no change in the hard systematic bits between iterations

term_on_pass 16 0 or 1

0: Do not terminate early if CRC passes

1: Terminate early if CRC passes

include_parity_op 15 0 to 1

0: Output systematic values only

1: Output systematic values and parity

hard_op 14 0 to 1

0: Soft output

1: Hard output

crc_type 13 0 to 1

0: CRC24B

1: CRC24A

These CRC types are defined in 3GPP TS 38.212 V15.0.0 Multiplexing and channel coding

code_block_size 12:0 40 to 6144 Turbo code block size (K); encoded block size N=3*K+12