- The
DOUT data output stream consists of four
128-bit lanes. The number of lanes depends on the setting of the AXIS_WIDTH.DOUT
parameter.
- When decoding, either bytes of LLR or bytes of hard bits are transferred over
DOUT, depending on the hard_op setting in the input to
CTRL for the associated block. When encoding, only hard data is
transferred over DOUT, and there is no hard_op setting in the input
CTRL.
- Blocks are transferred over one or more cycles, starting with the
least significant LLR or hard bits first.
- The number of bytes transferred over
DOUT on
each cycle is given by the DOUT_WORDS input stream.
See LLR Output Words (DOUT_WORDS)
for details on how DOUT_WORDS is used.
- Data bytes are transferred in the least significant bytes of
each
DOUT lane. For example, if DOUT_WORDS
specifies two bytes are transferred in lane 0, then these bytes are in llr(0) and
llr(1) (in bits 7:0 and 15:8).
- Each transfer can only contain one block; one block must complete before the next block can
start. For multi-lane transfers, this might require the
final transfer to have one or more of the higher lanes size set to zero or one
of the lane values to be reduced. The core enforces this internally on output so
that blocks start on lane 0 of the next AXI4-Stream
transaction.