LDPC Decoder Support for W>1 - 1.1 English

Soft-Decision FEC Integrated Block LogiCORE IP Product Guide (PG256)

Document ID
PG256
Release Date
2022-10-19
Version
1.1 English

Decoder support for W>1 is only available for codes with P ≤ 128. When any code has W>1, all codes that can be scheduled with it are limited to DC/PF×MV ≤ 64, irrespective of whether or not they employ W>1.

PF is the packing factor employed when PSIZE < 128 (in which case MV is always 1). PF is the number of submatrices executed per cycle and can take values 1, 2 or 4 depending on PSIZE. So providing it is not disabled by NO_PACKING, the limit on DC becomes:

PSIZE ≤ 32 allows PF=4 and DC ≤ 256

PSIZE ≤ 64 allows PF=2 and DC ≤ 128

PSIZE ≤ 128 allows PF=1 and DCxMV ≤ 64

When packing is employed, DC must accommodate any padding that is required.

The memory footprint of the code is increased by the number of circulants when W>1. This reduces the block size N that can be supported. For example, if PSIZE = 128, and a code has two circulants in three sub-matrices, the effective block size becomes N + 3*128.

Both the Vivado® IDE and the C Model generate the necessary sequence of operations for a particular code, and ensure that these constraints are met. This check should be performed early in the design process to ensure that a code is supported.