Simulation-Only Example Design - 1.1 English

Soft-Decision FEC Integrated Block LogiCORE IP Product Guide (PG256)

Document ID
PG256
Release Date
2022-10-19
Version
1.1 English

The IP example test bench <component_name>_tb, instantiates the IP instance and drives each AXI4-Stream interface with stimulus. When the AXI4-Lite parameter interface is exposed, this is programmed with the configuration specified for the IP instance.

The interface traffic is supplied to the test bench using two transaction logs (one each for the AXI4-Stream interfaces, and the AXI4-Lite parameter interfaces). The transaction logs are output during example design generation and contain stimulus specific to the IP instance. They are added to the example design project. AXI4-Stream transaction logs can also be produced using the C Model example application, allowing further stimulus to be defined. The transaction logs contain traffic for one block per LDPC code, defined during customization, up to a maximum of three blocks. The order corresponds to the order in which the codes are defined during customization. See the link below for code enumeration.

Figure 1. Example Test Bench