Soft Value Input for LDPC and Turbo Decode

Soft Value Input for LDPC and Turbo Decode - 1.1 English

Soft-Decision FEC Integrated Block LogiCORE IP Product Guide (PG256)

Document ID

PG256

Release Date

2022-10-19

Version

1.1 English

If the operation is decode, the information on the DIN input stream is soft value LLRs as described in the following table.

Note: The LLR input for LDPC decode is assumed to be externally symmetrically saturated to 6 bits (not 8 bits as for turbo decode). If this is not done, there might be significant performance degradation. For further details on scaling in LDPC decode see Normalization.

Table 1. Soft Value LLR Input AXI4-Stream Slave (DIN) Interface Definition
Bit Width for Each AXIS_WIDTH.DIN Setting			Field	Bits	Context	Range¹	Description
2 (4x)	1 (2x)	0 (1x)	Field	Bits	Context	Range¹	Description
512b	256b	128b	llr(0)	7:0	TURBO	-31.75 to 31.75	Systematic LLR, two fractional bits, externally saturated to given range.
			llr(0)	7:0	LDPC	-7.75 to 7.75	LLR, two fractional bits, externally saturated to given range.
			llr(1)	15:8	TURBO	-31.75 to 31.75	Parity LLR, two fractional bits.
			llr(1)	15:8	LDPC	-7.75 to 7.75	LLR, two fractional bits, externally saturated to given range.
			llr(2)	23:16	TURBO	-31.75 to 31.75	Parity Interleaved LLR, two fractional bits.
			llr(2)	23:16	LDPC	-7.75 to 7.75	LLR, two fractional bits, externally saturated to given range.
			llr(3)	31:24	TURBO	-31.75 to 31.75	Systematic LLR, two fractional bits.
			llr(3)	31:24	LDPC	-7.75 to 7.75	LLR, two fractional bits, externally saturated to given range.
			llr(4)	39:32	TURBO	-31.75 to 31.75	Parity LLR, two fractional bits.
			llr(4)	39:32	LDPC	-7.75 to 7.75	LLR, two fractional bits, externally saturated to given range.
			llr(5)	47:40	TURBO	-31.75 to 31.75	Parity Interleaved LLR, two fractional bits.
			llr(5)	47:40	LDPC	-7.75 to 7.75	LLR, two fractional bits, externally saturated to given range.
			...
			llr(15)	127:120
		Unused	llr(16)	135:128
			…
			llr(31)	255:248
	Unused		llr(32)	263:256
			…
			llr(63)	511:504
The LLR range depends on the scaling applied to the LLR prior to input. This range can be tuned to provide improved performance within the system, and two fractional bits should be viewed simply as the default. See Normalization for more information on scaling when performing LDPC Decode.