While the data interfaces support wide transfer widths, internally the throughput of the input and output interfaces is limited to a maximum of:
- Turbo decode: 12 LLRs @f(core_clk)
- LDPC decode: 16 LLRs or 16 hard bytes @f(core_clk)
- LDPC encode: 16 hard bytes @f(core_clk)
Turbo Decoder Interface Throughput Limit
For turbo decode, the internal interface throughput limit is 12 LLRs per
core_clk cycle, consisting of four sets of three 8-bit values
(systematic, parity, parity interleaved). If parity is not required at the output, then the
limit is four systematic LLR values per core_clk cycle. If hard output is
required, then the limit is still four systematic values per core_clk
cycle, but the four values are now hard bits.
LDPC Decoder Interface Throughput Limit
For the decoder, if the LDPC sub-matrix size, P, is not a multiple of 16, then not all
internal transfers into internal input memory are 16 LLRs. Transfers are in groups of P, and
the final transfer in a group is mod(P, 16), and the average I/O throughput is reduced to:
For example, if P=27, then the peak I/O B/W is: 
LDPC Encoder Interface Throughput Limit
For the encoder, transfers are at most 16 bytes, or 128 bits. If P<128 then at most P
bits are transferred between interface and memory per cycle and the average I/O throughput
becomes: 
For example, if P=360, then peak hard bits I/O B/W is: 
These limits provide lower limits on increased throughput possible with small numbers of iterations.