Table: MIPI CSI-2 TX Controller Core Registers specifies the name, address, and description of each firmware addressable register within the MIPI CSI-2 TX controller core.
|
Address Offset |
Register Name |
Description |
|---|---|---|
|
0x00 |
Core Configuration |
Core configuration options |
|
0x04 |
Protocol Configuration |
Protocol configuration options |
|
0x08 |
Reserved (1) |
|
|
0x0C |
Reserved |
|
|
0x10 |
Reserved |
|
|
0x14 |
Reserved |
|
|
0x18 |
Reserved |
|
|
0x1C |
Reserved |
|
|
0x20 |
Global interrupt enable |
Global interrupt enable registers |
|
0x24 |
Interrupt status |
Interrupt status register |
|
0x28 |
Interrupt enable |
Interrupt enable register |
|
0x2C |
Reserved |
|
|
0x30 |
Generic short packet entry |
Entry for the generic short packets |
|
0x34 |
Reserved |
|
|
0x38 |
Reserved |
|
|
0x3C |
Reserved |
|
|
0x40 |
Line count for virtual channel - 0 |
Number of lines for virtual channel - 0 |
|
0x44 |
Line count for virtual channel -1 |
Number of lines for virtual channel - 1 |
|
0x48 |
Line count for virtual channel -2 |
Number of lines for virtual channel - 2 |
|
0x4C |
Line count for virtual channel -3 |
Number of lines for virtual channel - 3 |
|
0x50 |
Reserved |
|
|
0x54 |
Reserved |
|
|
0x58 |
Reserved |
|
|
0x5C |
Reserved |
|
|
0x60 |
Reserved |
|
|
0x64 |
Reserved |
|
|
0x68 |
Reserved |
|
|
0x6C |
Reserved |
|
|
0x70 |
Reserved |
|
|
0x74 |
Reserved |
|
|
0x78 |
Generic short packet status |
Generic short packet FIFO status |
|
0x7C |
Reserved |
|
|
Notes: 1. Access type and reset value for all the reserved bits in the registers is read-only with value 0. 2. Register accesses should be word aligned and there is no support for a write strobe. WSTRB is not used internally. 3. Only the lower 7 bits (6:0) of the read and write address of the AXI4-Lite interface are decoded. This means that accessing address 0x00 and 0x80 results in reading the same address of 0x00. 4. Reads and writes to addresses outside this table do not return an error. 5. Register space from 0x40 to 0x4C is enabled only when the "C_EN_REG_BASED_FE_GEN" parameter is enabled, else the register space will be reserved. |
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