Create Ready Signal - 1.1 English

AXI Verification IP LogiCORE IP Product Guide (PG267)

Document ID
PG267
Release Date
2021-12-02
Version
1.1 English

The following shows how to create a specified rready signal. Use the AXI master VIP or AXI pass-through VIP in runtime master mode. Use the create API to create rready , set the low and high pattern, and then send it to the VIP interface. For other rready signals, if nothing is done, the AXI VIP itself generates this rready signal. For more information on different modes of the READY handshake, see the READY Generation section.

// master agent create rready

rready_gen = mst_agent.rd_driver.create_ready("rready");

// set the feature of rready signal. If nothing is done here, default pattern of ready will be generated

rready_gen.set_ready_policy(XIL_AXI_READY_GEN_OSC);

rready_gen.set_low_time(1);

rready_gen.set_high_time(2);

// send the rready to VIP interface

mst_agent.rd_driver.send_rready(rready_gen);