The Vivado Design Suite has a feature that each design can have multiple simulation sets according to your settings (AR: 64111). Especially, multiple test benches can be constructed for the same design. For example, one test bench provides stimulus for behavioral simulation of a complicated design and a different test bench provides stimulus for timing simulation of the implemented design.
The AXI VIP example design in the 2018.3 release has simulation sets
listed in the table Table 1. The
sim_all_config is a comprehensive simulation set. See the
AXI VIP Example Test Bench and Test section for a list of features.
It shows different examples of how to use the AXI VIP in a complex method.
For ease of use, 10 additional simulation sets with simple codes are also included in the example design. The 10 simulation sets can be named based on the followed structure:
sim_<basic or adv>_mst_<mode>__pt_<mode>__slv_<mode>
Where mode = active, mem, passive, or combo.
- For Master VIP, use active or passive mode.
- Active mode generates transactions and sends it out.
- In passive mode, the pass-through VIP is in runtime master mode while master VIP is not active.
- For Slave VIP, use mem, passive, or combo mode.
- In mem mode, slave VIP has a memory model.
- In passive mode, pass-through VIP is in runtime slave mode while slave VIP is not active.
- In combo mode, slave VIP does not have a memory model.
- For Pass-through VIP, use mst, slv, passive, or mem mode.
- In mst mode, pass-through VIP is in runtime master mode.
- In slv mode, pass-through VIP is in runtime slave mode without a memory model.
- In passive mode, pass-through VIP is not active.
- In mem mode, pass-through VIP is in runtime slave mode with a memory model.
For more information, see AXI VIP Example Test Bench and Test.
sim_basic_mst_passive__pt_mst__slv_comb means this simulation set is
performing a basic feature of the AXI VIP when the AXI master VIP is in passive mode.
The AXI pass-through VIP is in the runtime master mode and communicates to the AXI slave
VIP, which does not include the memory model.
For the 10 simulation set test benches, it includes three files which are generic_tb, master stimulus, and slave stimulus.
- The generic_tb performs a simple self-checking of the master side (can be AXI master VIP or AXI pass-through VIP in runtime master mode) against the slave side (can be AXI slave VIP or AXI pass-through VIP in runtime slave mode).
- Master stimulus is generated by the AXI master VIP or AXI pass-through VIP in the runtime master mode.
- Slave stimulus is generated by the AXI slave VIP or AXI pass-through VIP in the runtime slave mode with/without the memory model. The slave mem stimulus file is included and you can access the file to check the AXI slave VIP with the memory model.
The difference between basic and advanced simulation sets is that the basic simulation set shows the code snippets which are needed in the test bench to use the AXI VIP. Advanced simulation set adds more APIs such as user-configured READY signals which are optional. For more information, see the example design in the Vivado Design Suite and for usage of APIs, see the AXI VIP API Documentation.