TMR Comparator - 1.0 English

MicroBlaze Triple Modular Redundancy (TMR) Subsystem (PG268)

Document ID
PG268
Release Date
2022-04-28
Version
1.0 English

The TMR Comparator System tab is exemplified with the Discrete interface in This Figure .

Figure 4-6: TMR Comparator System Tab

X-Ref Target - Figure 4-6

TMR_Comparator_System_tab.png

TMR or Lockstep - Select Triple Modular Redundancy (TMR) or Lockstep mode.

Enable Self-checking Voter - Enable self-checking voter.

Activate TMR Disable Input - Activate TMR disable functionality.

Input Register - Clock input signals before comparison to improve maximum frequency.

Interface Type - Select comparator interface. Depending on the selected type, interface specific parameters are shown. The available interfaces and parameters are common with the TMR Voter (see page 67 for details), except for the following additional parameters only applicable for the TMR Comparator:

LMB1, LMB2 Bus Interface Type - Defines if the LMB bus interface is a Slave or Monitor interface, useful in dual lockstep configurations because a single slave interface is necessary in this case.

BRAM1, BRAM2 Bus Interface Type - Defines if the BRAM bus interface is a Slave or Monitor interface, useful in dual lockstep configurations because a single slave interface is necessary in this case.

AXI1, AXI2 Bus Interface Type - Defines if the AXI4 or ACE bus interface is a Slave or Monitor interface, useful in dual lockstep configurations because a single slave interface is necessary in this case.

AXIS1, AXIS2 Bus Interface Type - Defines if the AXI4-Stream bus interface is a Slave or Monitor interface, useful in dual lockstep configurations because a single slave interface is necessary in this case.

Trace Included in Comparator - Specifies the Trace bus signals included in the comparison:

° FULL: All signals.

° REGWR: Trace_Valid_Instruction, Trace_Reg_Write, Trace_Reg_Addr, and Trace_New_Reg_Value.

° REGWR DATA: Trace_Data_Access, Trace_Data_Address, Trace_Data_Write_Value, Trace_Data_Byte_Enable, Trace_Data_Read, and Trace_Data_Write in addition to all REGWR signals.

Trace1, Trace2, Trace3, Trace Bus Interface Type - Defines if the Trace bus interface is a Slave or Monitor interface.

IRQ1, IRQ2 Bus Interface Type - Defines if the Interrupt bus interface is a Slave or Monitor interface, useful in dual lockstep configurations because a single slave interface is necessary in this case.

IO1, IO2 Bus Interface Type - Defines if the I/O Bus interface is a Slave or Monitor interface, useful in dual lockstep configurations because a single slave interface is necessary in this case.

UART1, UART2 Bus Interface Type - Defines if the UART bus interface is a Slave or Monitor interface, useful in dual lockstep configurations because a single slave interface is necessary in this case.

GPIO1, GPIO2 Bus Interface Type - Defines if the GPIO bus interface is a Slave or Monitor interface, useful in dual lockstep configurations because a single slave interface is necessary in this case.

IIC1, IIC2 Bus Interface Type - Defines if the IIC bus interface is a Slave or Monitor interface, useful in dual lockstep configurations because a single slave interface is necessary in this case.

The TMR Comparator Advanced tab is shown in This Figure .

Figure 4-7: TMR Comparator Advanced Tab

X-Ref Target - Figure 4-7

TMR_Comparator_Advanced_tab.png

Comparator Status Read and Fault Injection - Enable functional test of individual comparators via AXI4-Stream interfaces. READ enables status read of comparison results, and INJECT also enables fault injection.

Last Compare Status Read Interface - Set for the last comparison status read interface, furthest from the processor reading the status.

Status Read Data Width - Define the AXI-Stream data width for comparison status read.

First Interface Temporal Depth - Defines the Lockstep Fail Safe configuration temporal depth in clock cycles for the first interface. Set to 0 by default, which means temporal lockstep is not implemented.

Not shown in the figure, since it is only visible when TMR or Lockstep on the System tab is set to LOCKSTEP.

Second Interface Temporal Depth - Defines the Lockstep Fail Safe configuration temporal depth in clock cycles for the second interface. Set to 0 by default, which means temporal lockstep is not implemented.

Not shown in the figure, since it is only visible when TMR or Lockstep on the System tab is set to LOCKSTEP.