The TMR Voter System tab is exemplified with the Discrete interface in This Figure .
TMR or Lockstep - Select Triple Modular Redundancy (TMR) or Lockstep mode.
Enable Self-checking Voter - Enable self-checking voter.
Activate TMR Disable Input - Activate TMR disable functionality.
Enable Build-in Comparator - Enable built-in comparator, useful with a triplicated LMB BRAM, where the read data must be voted and compared.
Interface Type - Select comparator interface. Depending on the selected type, the following interface-specific parameters are shown. With Vivado IP integrator these parameters are auto generated. The available interfaces are:
• Discrete
Width of Discrete Port - Number of bits in the discrete port vector.
• LMB and LMB Slave - xilinx.com:interface:lmb:1.0
LMB Address Width - LMB address width.
LMB Data Width - LMB data width.
ECC Enabled - ECC enabled on LMB.
• BRAM and BRAM Master - xilinx.com:interface:bram:1.0
• AXI4, AXI4-Lite, ACE - xilinx.com:interface:aximm:1.0, xilinx.com:interface.acemm:1.0
Address Width - AXI address width.
Data Width - AXI data width.
ID Width - AXI ID width.
ARUSER, AWUSER, RUSER, WUSER, BUSER Width - AXI channel user widths.
• AXI4-Stream Master, AXI4-Stream Slave - xilinx.com:interface.axis:1.0
Data Width - AXI-Stream data width in bits.
ID Width - AXI-Stream ID width in bits.
DEST Width - AXI-Stream destination width in bits.
USER Width - AXI-Stream user width in bits.
• MicroBlaze Trace - xilinx.com:interface:mbtrace:2.0
Data Size - Trace Data Size.
• MicroBlaze Interrupt - xilinx.com:interface:mbinterrupt:2.0
Interrupt Latency - Low latency interrupt.
• I/O Bus - xilinx.com:interface:iobus:1.0
• GPIO - xilinx.com:interface:gpio:1.0
GPIO Board Interface - Defines the board interface that GPIO is connected to.
GPO Size - Bit size of the GPO and GPT signals.
GPI Size - Bit size of the GPI signal.
• UART - xilinx.com:interface:uart:1.0
UART Board Interface - Defines the board interface that the UART is connected to.
• IIC - xilinx.com:interface.iic:1.0
IIC Board Interface - Defines the board interface that the IIC is connected to.
The TMR Voter Advanced tab is shown in This Figure . This tab is only activated when Enable Build-in Comparator is selected or when TMR or Lockstep is set to LOCKSTEP, and is identical to the equivalent tab on the TMR Comparator.
Comparator Status Read and Fault Injection - Enable functional test of individual comparators via AXI4-Stream interfaces. READ enables status read of comparison results, and INJECT also enables fault injection.
Last Compare Status Read Interface - Set for the last comparison status read interface, furthest from the processor reading the status.
Status Read Data Width - Define the AXI-Stream data width for comparison status read.
First Interface Temporal Depth - Defines the Lockstep Fail Safe configuration temporal depth in clock cycles for the first interface. Set to 0 by default, which means temporal lockstep is not implemented.
Not shown in the figure, since it is only visible when TMR or Lockstep on the System tab is set to LOCKSTEP.
Second Interface Temporal Depth - Defines the Lockstep Fail Safe configuration temporal depth in clock cycles for the second interface. Set to 0 by default, which means temporal lockstep is not implemented.
Not shown in the figure, since it is only visible when TMR or Lockstep on the System tab is set to LOCKSTEP.