Converter 2 Interrupt Register (0x0218) - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

Document ID
PG269
Release Date
2023-10-18
Version
2.6 English
Table 1. Converter 2 Interrupt Register (0x0218)
Bit Default Value Access Type Description
31:16 - - Reserved (read back 0)
31:20 1 - - Reserved (read back 0)
19 0 RO Clear on Reset Flags a common mode under voltage interrupt in the converter 2, 3
18 0 Flags a common mode over voltage interrupt in the converter 2, 3
17:16 - - Reserved (read back 0)
15 0 RO Clear on Reset Flags a FIFO overflow in converter when High
14 0 Flags a datapath overflow in converter when High
13 0 Flags an overflow on the observation channel FIFO in converter when High 2 , 3
12:4 - - Reserved (read back 0)
3 0 RO Clear on Reset Flags an Over Range interrupt in converter 2
2 0 RO Clear on Read Flags an Over Voltage interrupt in converter 2
1:0 - - Reserved (read back 0)
  1. 31:16 is Reserved (read back 0) for Gen 1/Gen 2 devices.
  2. RF-ADC only.
  3. Gen 3/DFE only.