Dual RF-DAC I/Q Input to I/Q Output (Gen 3/DFE) - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

Document ID
PG269
Release Date
2023-10-18
Version
2.6 English

For I/Q input to I/Q output, the RF-DACs are paired. An I/Q output signal requires a pair of RF-DACs, one for I data and one for Q data. As shown in the following figure, a single DUC block outputs I and Q data and these signals are sent to the two RF-DACs.

Figure 1. RF-DAC I/Q Input to I/Q Output
Figure 2. Dual RF-DAC I/Q Input to I/Q Output IP Core Configuration

The following figure shows a Dual RF-DAC with I/Q input data to I/Q output data with 2x interpolation, the mixer bypassed, and with a 400 MHz AXI4-Stream clock.

Figure 3. Dual RF-DAC I/Q Input to I/Q Output Data Timing (Gen 3/DFE)
Note: Interpolation is x2 because the bandwidth available on the AXI4-Stream interface is limited.
Note: I/Q input to I/Q output configurations are not available on devices with one RF-DAC per tile.