The external sampling clock can be forwarded from the RF-DAC group to RF-ADC Tile 3 and/or 2 through a clock divider of 1 or 2. Tile 3 and 2 have embedded clock dividers of 1 or 2 to output the desired clock frequencies, note the clock divider in Tile 3 and 2 are only available for quad RF-ADC tiles in this case. The RF-ADC tile 0 and 1 share another external sampling clock.
Figure 1. External Sampling Clock Forwarding (Gen 3)
Figure 2. External Sampling Clock Forwarding (DFE)