RF-ADC Analog Input - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

Document ID
PG269
Release Date
2023-10-18
Version
2.6 English

Every RF-ADC in a tile has its own differential analog input buffer. This input is optimized for performance and requires source impedance matching for best dynamic performance.

CAUTION:
The Vcm is different between Gen 1/Gen 2 and Gen 3/DFE.
Figure 1. RF-ADC Analog Input (Gen 1/Gen 2)

Note: In the figure above the waveform diagram is an oscilloscope representation with a DC offset.
Figure 2. RF-ADC Analog Input (Gen 3/DFE)

There are several ways to drive an RF-ADC in a tile. Driving the RF-ADC can be either active or passive. However, optimum performance is achieved by driving the analog input differentially. For AC-coupled mode, the input signals should be AC-coupled in using capacitors. For DC-coupled mode, the output VCM buffer is enabled as shown in the figure above. This buffer is only enabled when DC-coupled mode is selected. This VCM buffer allows you to set the common mode of the external active driving circuit with the ADC internal common requirements. Two VCM buffers (VCM01, VCM23) are available for each tile.

When in DC coupled mode and driving with an external active device, the power supplies of the RF-ADC need to be active and at the correct level before the driving device can be enabled. If the RF-ADC supplies are not enabled the RF-ADC inputs need to be pulled to ground. When the Zynq UltraScale+ RFSoC is powered up, the common-mode level should be within the specified range. It is assumed here that the driving circuit and RFSoC have a common ground plane in line with AMD RFSoC PCB integration guidelines.

For all applications where the signal-to-noise ratio (SNR) is a key parameter, AMD recommends using a differential transformer or balun configuration. See the UltraScale Architecture PCB Design User Guide (UG583) for details on how to design the input networks and PCB.

For unused or disabled ADC channels, the following are the recommendations on the input pins:

  1. When an ADC channel is not enabled in the IP and the channel will never be in use over its lifetime, then the ADC VIN pins should be tied to GND directly.
  2. When an ADC channel is enabled in the IP but is not being driven by anything on the PCB, the RF input can be let floating. You must ensure that the AC coupled mode is chosen. This might be required for certain SYSREF distribution use cases where the ADC channels can be powered either up or down via software, while the channel is enabled in the IP.