adcXY_nco_freq[47:0] |
In |
s_axi_aclk |
Requested NCO frequency setting. This is a
48-bit signed input representing the NCO frequency. The value ranges
from -Fs/2 to Fs/2, where Fs is the sampling
rate |
adcXY_nco_phase[17:0] |
In |
s_axi_aclk |
Requested NCO phase setting. This is a 18-bit
signed number representing the NCO phase. The value ranges from -180
to 180 degrees |
adcXY_nco_phase_rst |
In |
s_axi_aclk |
NCO phase reset. Used to align the phases across
the converter |
adcXY_nco_update_en[5:0] |
In |
s_axi_aclk |
Enable register writes
- Bit 5: Enable write to phase reset
- Bit 4: Enable write to NCO phase bits
17:16
- Bit 3: Enable write to NCO phase bits
15:0
- Bit 2: Enable write to NCO frequency bits
47:32
- Bit 1: Enable write to NCO frequency bits
31:16
- Bit 0: Enable write to NCO frequency bits
15:0
|
adcX_nco_update_req |
In |
s_axi_aclk |
Asserted High to request an update of the NCO
settings |
adcX_update_busy |
Out |
s_axi_aclk |
Update busy register. High when the NCO update
is in progress |
- X refers to the
location of the tile in the converter column. Y refers to
the location of the DDC block in the tile (0 to 3).
|