TDD Mode (Gen 3/DFE) - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

Document ID
PG269
Release Date
2023-10-18
Version
2.6 English

Time Division Duplexing (TDD) is a wireless system architecture that uses the same carrier frequency for transmitting as well as receiving. This means that the TX (RF-DAC) and RX (RF-ADC) are not required to be active at the same time. The Zynq UltraScale+ RFSoC supports the following two modes to benefit from TDD applications:

TDD power saving mode
The RFSoC allows independent RF-ADC or RF-DAC channels to be powered down and wake up at any given moment, resulting in considerable system power savings.
TDD RX/Obs sharing mode
The RFSoC allows a sub-set of the RF-ADCs to be shared between the RX and Observation (Obs) modes in different time slots, two RF-ADC decimation states (data rates) are maintained with dynamic switching between them.

The following diagram shows how the RFSoC works in the TDD application.

Figure 1. RFSoC in TDD Mode