Tile Mapping (Gen 1/Gen 2/Gen 3) - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

Document ID
PG269
Release Date
2023-10-18
Version
2.6 English

Physically and for IP references, the RF-ADC tiles are named, following package bank allocation, Tile_224/225/226/227, and the RF-DAC tiles are named, Tile_228/229/230/231. In the software driver API documents, ADC_Tile0/1/2/3 and DAC_Tile0/1/2/3 are used for programming convenience.

Table 1. Tile Name Mapping
RF-ADC RF-DAC
Tile_224 ADC_Tile0 Tile_228 DAC_Tile0
Tile_225 ADC_Tile1 Tile_229 DAC_Tile1
Tile_226 ADC_Tile2 Tile_230 DAC_Tile2
Tile_227 ADC_Tile3 Tile_231 DAC_Tile3