XRFdc_SetInterpolationFactor - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

Document ID
PG269
Release Date
2023-10-18
Version
2.6 English

Function Prototype

u32 XRFdc_SetInterpolationFactor(XRFdc *InstancePtr, u32 Tile_Id, u32 Block_Id, u32 InterpolationFactor);

Arguments

XRFdc *InstancePtr
Pointer to the driver instance.
u32 Tile_Id
RF-DAC tile number. Valid values are 0-3.
u32 Block_Id
RF-DAC number. Valid values are 0-3.
u32 InterpolationFactor
Interpolation factor to be set for the RF-DAC.
Table 1. Valid Macros for InterpolationFactor Argument
Macro Description
XRFDC_INTERP_DECIM_OFF Interpolation is OFF
XRFDC_INTERP_DECIM_1X 1X interpolation factor
XRFDC_INTERP_DECIM_2X 2X interpolation factor
XRFDC_INTERP_DECIM_3X 3X interpolation factor 1
XRFDC_INTERP_DECIM_4X 4X interpolation factor
XRFDC_INTERP_DECIM_5X 5X interpolation factor 1
XRFDC_INTERP_DECIM_6X 6X interpolation factor 1
XRFDC_INTERP_DECIM_8X 8X interpolation factor
XRFDC_INTERP_DECIM_10X 10X interpolation factor 1
XRFDC_INTERP_DECIM_12X 12X interpolation factor 1
XRFDC_INTERP_DECIM_16X 16X interpolation factor 1
XRFDC_INTERP_DECIM_20X 20X interpolation factor 1
XRFDC_INTERP_DECIM_24X 24X interpolation factor 1
XRFDC_INTERP_DECIM_40X 40X interpolation factor 1
  1. Gen 3/DFE only.

Description

This API function sets the interpolation factor for the requested RF-DAC and also updates the FIFO read width based on the interpolation factor.

Dynamic change in interpolation has an impact on the block throughput. The AXI4-Stream clock rate can be dynamically changed to account for this change of throughput. In non-MTS mode, the recommended procedure is to turn off the FIFO (Xrfdc_setupfifo), change the clock rate (Xrfdc_SetfabClkOutDiv), clear the FIFO interrupt, and restart the FIFO (Xrfdc_SetupFifo).

Return Value

XRFDC_SUCCESS

XRFDC_FAILURE