struct XRFdc_ADC_Tile - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

Document ID
PG269
Release Date
2022-10-21
Version
2.6 English

This structure is for internal driver use.

u32 TileBaseAddr;
u32 NumOfADCBlocks; 
XRFdc_PLL_Settings PLL_Settings;
u8 MultibandConfig;
XRFdc_ADCBlock_AnalogDataPath ADCBlock_Analog_Datapath[4];
XRFdc_ADCBlock_DigitalDataPath ADCBlock_Digital_Datapath[4];

Description

u32 TileBaseAddr
Tile base address.
u32 NumOfADCBlocks
Number of RF-ADCs enabled.
XRFdc_PLL_Settings PLL_Settings
PLL settings structure.
u8 MultibandConfig
Multiband configuration for ADC Tile.
XRFdc_ADCBlock_AnalogDataPath ADCBlock_Analog_Datapath[4]
ADCBlock_AnalogDataPath structure for four RF-ADCs.
XRFdc_ADCBlock_DigitalDataPath ADCBlock_Digital_Datapath[4]
ADCBlock_DigitalDataPath structure for four RF-ADCs.