struct XRFdc_MultiConverter_Sync_Config - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

Document ID
PG269
Release Date
2023-10-18
Version
2.6 English

This structure is used to configure the MTS algorithm. Indicated files can be configured in the code.

u32 RefTile;
u32 Tiles;
int Target_Latency;
int Offset[4];
int Latency[4];
int Marker_Delay;
int SysRef_Enable;
XRFdc_MTS_DTC_Settings DTC_Set_PLL;
XRFdc_MTS_DTC_Settings DTC_Set_T1;

Description

u32 RefTile
Reference tile.
u32 Tiles
Bitmask indicating which tiles to align. BitX enables MTS for TileX. Tile0 must always be enabled.
int Target_Latency
Sets the target relative latency. This is required to be set for multi-device alignment, or deterministic latency use-cases. It is not required to be set for single-device alignment.
int Offset[4]
Status – indicates the value the interface data was delayed by to achieve alignment, per tile.
int Latency[4]
Status – indicates the measured relative-latency value of each tile.
int Marker_Delay
Marker delay is for internal use.
int SysRef_Enable
Set to 1 (default) to keep SYSREF capture enabled after MTS runs. Set to 0 to disable SYSREF capture.