AXI Port Details - 1.0 English

AXI High Bandwidth Memory Controller v1.0 LogiCORE IP Product Guide (PG276)

Document ID
Release Date
1.0 English
For signal definitions and protocol, see the AMBA AXI Protocol Specification. When user parity is enabled, drive the correct parity value on WDATA_PARITY for Write transactions. The RDATA_PARITY bus provides the Read data parity along with the Read data. The parity calculation is done on a per-byte basis where a 1 is asserted if the sum of the bits in a byte is Odd.

Each AXI port can accept 64 read transactions and 32 write transactions.