Configuration View - 1.0 English

AXI High Bandwidth Memory Controller v1.0 LogiCORE IP Product Guide (PG276)

Document ID
PG276
Release Date
2021-08-06
Version
1.0 English

After programming the device, a list of IPs with a debug interface is displayed underneath the FPGA device in a tree. There will be one icon for each stack of HBM. If the IP is configured to utilize only one HBM stack, then only one icon will appear in the debug tree. The status of calibration is displayed to the right of the HBM instance as shown in the following figure:

Figure 1. HBM Stack Property Window

Selecting an HBM stack will change the Properties window with HBM specific information. There are three tabs in the HBM Core Properties view:

General tab
The General tab lists the debug instance name (HBM_1) as shown in the following figure and the instance name. It also displays the calibration result.
Properties tab
The Properties tab provides internal configuration register information. These registers are initialized when the hardware manager is opened. To load more current values, right click the HBM instance and select Refresh. To force an update to all register values, right click the HBM instance in the debug tree and select Refresh HBM Core. The register contents in the IEEE, MC, and PHY elements are in hex. Most of these registers are for internal use and may not be defined in this product guide.
Configuration tab
The Configuration tab shows the options that are set for the HBM stack. The values mentioned here match with the values selected during the IP generation. A single HBM stack is partitioned and driven by 8 memory controllers, and each may be configured independently. To see the configuration options of an individual controller, double click the Memory Controller text to expand it.
Figure 2. HBM Stack Configuration tab