Default Behavior of the Synthesizable Traffic Generator - 1.0 English

AXI High Bandwidth Memory Controller v1.0 LogiCORE IP Product Guide (PG276)

Document ID
PG276
Release Date
2021-08-06
Version
1.0 English

The synthesizable traffic generator behavior is controlled by the value set in the DEFAULT_MODE parameter for each traffic generator instance in the top level of the Example Design. This is set to “HBM” by default as seen below:

Figure 1. Synthesizable Traffic Generator Default Mode

This DEFAULT_MODE of “HBM” is one of the possible use cases that have been defined for the HBM IP. To change the DEFAULT_MODE simply modify the value in the example_top_syn.sv file for each traffic generator instance in the Example Design. When running in hardware for this mode the traffic generator run in a loop where it will linearly write through the entire pseudo channel address range with a PRBS data pattern and then read back the entire range while checking for data errors. The address range is automatically determined by the stack height of the HBM device in the design. When the “Add VIO” option is not selected the traffic generator will start once the apb_complete_x signal has been asserted for that stack. When the “Add VIO” option has been enabled the traffic generator will not start until the vio_tg_start_x signal has been manually set to 1’b1 through the VIO dashboard in the Vivado Hardware Manager. There will be one vio_tg_start_x signal for every AXI port that has been enabled in the design. In simulation this traffic mode will perform one linear write sequence of 256 32-byte bursts with PRBS data and then one linear read sequence of 256 32-byte bursts with error checking.