This chapter provides two example systems: one containing the Video Frame Buffer Read and the other one containing both the Video Frame Buffer Read and the Video Frame Buffer Write cores. Important system-level aspects when designing with the cores are highlighted in the example designs, including:
- Typical usage of the Video Frame Buffer Read and Video Frame Buffer Write in conjunction with other cores.
- Runtime configuration of the Video Frame Buffer Read and Video Frame Buffer Write by programming registers on-the-fly.
The supported platforms are listed in the following table.
|Development Boards||Additional Hardware||Processor|
To open the example project, perform the following:
- Select the Video Frame Buffer Read IP or Video Frame Buffer Write IP from the AMD Vivado™ IP catalog.
- Double-click the selected IP or right-click the IP and select Customize IP from the menu.
- Configure the parameters in the Customize IP window as needed and click OK.
- In the Generate Output Products window, select Generate or Skip. If Generate is selected, the IP output products are generated after a brief moment.
- Right-click Video Frame Buffer Read or Video Frame Buffer Write in the Sources panel and select Open IP Example Design from the menu.
- In the Open IP Example Design window, select the example project directory and click OK. The Vivado software then runs automation to generate the example design in the selected directory.